Julien Boucaron's Page

International Conference

• Another Glance at Relay Stations in Latency Insensitive, FMGALS’2005.
• Latency-Insensitive Design and Central Repetitive Scheduling, MEMOCODE’2006 Slides
• Compositionality of Statically Scheduled IP, FMGALS’2007.
• Latency-Insensitive Design: Retry Relay-Station and Fusion Shell, FMGALS’2009 Slides

Journal

• Formal Methods for Scheduling of Latency-Insensitive Design, EURASIP’2007.

PhD:

• Modélisation formelle de systèmes Insensibles à la Latence et ordonnancement, 2007. French slides with my speech notes.

Chapter:

• Formal Modeling of Embedded Systems with Explicit Schedules and Routes, 2010 in Book:  Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction.

Local Conference:

• Latency Insensitive Design: Dynamic and Static scheduling with proper formal devices, SAME’2006.

Research Reports:

• Another glance at Relay Stations in Latency-Insensitive Designs, 2005.
• Latency-Insensitive Design and Central Repetitive Scheduling, 2006.
• Formal Methods for Schedulings of Latency-Insensitive Designs, 2007.
• Statically scheduled Process Networks, 2007.
• Kahn-extended Event Graphs, 2008
• Throughput and FIFO Sizing: an Application to Latency-Insensitive Design, 2009
• Dynamic Variable Stage Pipeline: an Implementation of its Control, 2009
  

Synchron Workshops:

• KPASSA and Latency-Insensitive Design, 2009 in Dagstuhl.
• K-periodically routed process networks, 2008 in Aussois.
• Using periodic static schedule information in Latency-Insensitive Design, 2006 in Alpes d’Huez.

Poster

• Latency Insensitive Design: Dynamic and Static scheduling with proper formal devices,SAME’2006.
• ,SAME’2007.
• A Formal Modelling Framework for Periodically Schedulled Network On Chip,SAME’2008.

Demo

• A Formal Modelling Framework for Periodically Schedulled Network On Chip,SAME’2008.